黄仁勋指出，美国对华芯片出口管制非但无法阻碍中国AI发展，反而可能成为产业自主的催化剂。制裁导致的市场空缺正推动华为等国内供应商成长。当前竞争已从比拼最快加速器，转向比拼定义智能操作层的能力，涵盖芯片、能源、模型和标准。推文补充了华为的最新动向：为应对制裁，华为提出“Tau Scaling Law”新设计方法，旨在通过LogicFolding等技术缩短信号延迟，在不依赖最先进光刻机的前提下实现1.4nm级密度。华为声称已量产381款芯片，并计划2031年达成该目标，其路径被命名为“何氏定律”。
Jensen Huang explains how blocking China from Nvidia does not mean blocking China from AI.
The usual export-control story assumes scarcity: deny the best chips, and the rival falls behind.
China is no longer merely waiting at the door of American compute.
Huawei’s rise is showing how a sanction is turning into an industrial stimulus: absence creates a market, and a market teaches domestic suppliers how to harden, scale, and export.
That does not mean that the gap with Nvidia chips has vanished.
It means the real contest is no longer just about who owns the fastest accelerator, but who sets the operating layer for intelligence: chips, energy, infrastructure, models, applications, and the standards others build upon.
The mistake is to treat chip policy as a valve that can simply open or close.
Every restriction slows one flow but strengthens another, and the long-term danger may be a world where American technology is absent from the very systems America wants to influence.
----
From "Fox Business" YouTube channel, (link in comment)
🇨🇳 Huawei reveals a new chip design breakthrough under US sanctions pressure. A design approach meant to close the gap with TSMC and Intel without relying only on smaller transistors, by making chip signals travel less distance. They want 1.4nm-class density without owning the world’s best lithography tools i.e. they are trying to replace Moore’s Law with Tau Scaling Law. To note, Huawei has been blocked from normal access to TSMC since the US tightened foreign direct product rules around Huawei in 2020, and TSMC later said it had not supplied Huawei since mid-September 2020. Proposed τ Scaling as a new way to make chips faster when shrinking transistors is no longer delivering the same gains. Said its next Kirin phone chip will be the first full test of Tau Scaling Law, Old chip progress mostly came from making every transistor smaller, but Huawei’s idea shifts the target from smaller geometry to shorter signal delay, meaning less time wasted while electrical signals crawl through wires, gates, memory paths, and system links. LogicFolding attacks the circuit layout itself by folding logic blocks closer together, shortening critical wires, reducing resistance and parasitic capacitance, and letting signals switch faster with denser placement. So LogicFolding is the circuit-level piece: it tries to place related logic closer together, shorten key wires, cut electrical drag from resistance and parasitic capacitance, and raise performance without needing a full manufacturing-node leap. Huawei is also pushing the same timing idea across the full stack: transistors, circuits, chip architecture, software scheduling, and system interconnects all get tuned to reduce τ, the delay constant that limits speed and efficiency. The bold claim is that Huawei has already mass-produced 381 chips using this thinking, and future high-end chips could reach density comparable to 14Å, or 1.4nm, without relying only on classic process shrinkage. Says this path could reach 1.4nm-class, or 14Å-class, density by 2031, while TSMC and Intel target similar physical nodes around 2029. Huawei calls it Her’s Law, after He Tingbo, the chip leader who helped turn HiSilicon into Huawei’s survival engine after US export controls. --- huawei. com/en/news/2026/5/ieee-iscas-tau-scaling在 X 查看被引用的帖子
来源：Rohan Paul · x.com